875p、865系列的MCH中Dynamic Paging Mode及对Intel技术发展模式
:?: Dynamic Paging ModeWhen the MCH is configured to operate in this mode, Front-Side Bus (FSB) to Memory Busaddress mapping undergoes a significant change compared to that of in a linear operating mode
(normal operating mode). In non-dynamic paging mode, the Rank selection (Rank or ROW
indicates the side of a DIMM) via chip select signals, is done based on the size of the ROW. For
example, for a 512-Mb 16MX8X4b will have a ROW size of 512 MB, selected by CS0#, and only
four open pages can be maintained for the full 512 MB. This will lower the memory performance
(increases READ latencies) if most of the memory cycles are targeted to that single ROW resulting
in opening and closing of accessed pages in that ROW.
等等
这是Intel 875P Chipset MemoryConfiguration Guide White Paper中的节选
865系列也有，请问有人理解其中Dynamic Paging Mode的作用吗？本人愚钝，只明白小许，请高人指点，谢谢了。
Intel一贯喜欢在高端使用新技术，然后当生产条件成熟或市场有需求时把高端技术应用到desktop PC上，例如超线程技术先在至强上应用，再用在奔四上；双通道也是，等等。因此研究一下Intel的高端产品，特别是主板我想还是有点意义，大家说是不？请各位高人指正，谢谢。 这不是什么新技术，而是对以往Intel多页面调试（允许在4个物理Bank中同时打开16个页面）技术的一个新称呼 这个问题？我看不懂E文的先！ 谢谢各位啊，我会再查找相关资料搞清楚它。我想再问一下intel的技术文档以前怎称呼它呢？
页:
[1]